CXP2.0 HOST FPGA IP
●Protocol Standard: CoaXPress V2.0 (Backward compatible with V1.1, V1.0)
●Link Configuration: Supports 1/2/4/8 links, max. CXP‑12 mode
●Transmission Specs: High-speed downstream image transmission, 41.6Mbps uplink, up to 8 parallel video streams
●Interface Bus: AXI4 control bus, dedicated video bus, equipped with GPIO and trigger interfaces
●Hardware Compatibility: Supports all Xilinx FPGAs, verified on multiple development boards
●PHY Solution: Adopts FPGA built-in high-speed transceivers
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